Chapter 1     WHAT IS AN OPAMP (Answer Sheet)

Name:                        Date:                                  Answer Sheet Print Version






       The purpose of this experiment is to measure the input offset volt­age of a 741 op-amp.


Pin Configuration of 741 Op-Amp (Fig. 1-14)


Schematic Diagram of Circuit (Fig. 1-15)

Fig 1-14.

Fig. 1-15.



The ideal op-amp produces zero volts out for zero volts in. In a practical op-amp, however, a small dc voltage, Vout(error), appears at the output when no differential input voltage is applied. Its primary cause is a slight mismatch of transistors in the differential input stage of the op-amp.


As specified on an op-amp data sheet, the input offset voltage (VOS) is the differential dc voltage required between the inputs to force the output to zero volts. Typical values of input offset voltage are in the range of 2 mV or less. In an ideal case, 0 Volts.


Design Basics

Closed Loop Gain:    

Input Offset voltage:            


Step 1    

Wire the circuit shown in the schematic diagram. For this ex­periment, the power supply connections to the op-amp are shown in the schematic diagram. For the remaining experiments they will be omitted from the diagrams, as these connections are usually implied.


        Step 2

Apply Power to the breadboard, and with your voltmeter (preferably a digital type), measure the output voltage and record below.

 Vos = mV


            Step 3

Using the formula given in the Design Basics section, calculate the input offset voltage, Voi, recording your result below:

   Voi mV


Since all the experiments in the first 7 chapters use the 741 op-amp powered by a dual voltage supply, when you are finished with each ex­periment, disconnect all the connections to the op-amp except the power (pins 4 and 7). In this way, you won’t forget to make these connections when wiring the next experiment, as these power con­nections are usually omitted from schematic diagrams.





The purpose of this experiment is to measure the input bias currents of the 741 C  op-amp.

Schematic Diagram of Circuit (Fig.1-16)


Fig. 1-16


The input terminals of a bipolar differential amplifier are the transistor bases and , therefore, the input currents are the base currents. The input bias current is the dc current required by the inputs of the amplifier to properly operate the first stage. By definition, the input bias current is the average of both input currents. The inpur bias current is so small in most practical applications that it can be considered to be zero. The concept of input bias current is

Design Basics

Bias current:                              ,

Step 1

Wire the circuit shown in the schematic diagram. Don’t forget the power supply connections to the op-amp!

Step 2

Apply power to the breadboard. First measure the voltage across resistor R1 (VA ), recording your result below:

        VA = mV

Then measure the voltage across resistor R3 (VB ), recording your result below:

        VB = mV

For my experiment, I measured 15.2 mV for VA  and 12.7 mV for VB .

Step 3

From the formulas given in the Design Basics section, calculate the input bias currents IB1 and IB2, recording your results below:

        IB1  = nA     IB2 = nA

For the ideal op-amp both bias currents are equal; however, for the “real world” device, the input bias currents are not equal. The manufacturer gives a value that is the average of the two. Take the average of the two currents above, and record your result below:

 IB average = nA

For the 741C op-amp, the typical average value for the input bias current is 80 nA, with a maximum of 500 nA. For my experiment, I measured an average current of 139 nA, which is within the devices’s rating.






The purpose of this experiment is to measure the intrinsic input impedance of a 741C op-amp. 

Schematic Diagram of Circuit (Fig. 1-17) Design Basics

Fig. 1-17.



Two basic ways of specifying the input resistance of an op-amp are the differential and the common mode. The differential input resistance is the total resistance between the inverting and the non-inverting inputs. Differential input impedance is measured y determining the change in bias current for a given change in each differential input voltage. The common mode input resistance is the resistance between each input and ground and is measured by determining the change in bias current for a given change in common-mode input voltage. The input resistance is always high.

Design Basics:   

Input Resistance:   Zi = R, when V1 =

Step 1

Set your oscilloscope for the following settings:

•   Channels 1 & 2: 0.5 volt/division

•   Time base: 1 msec/division

•   AC coupling

Step 2

Wire the circuit shown in the schematic diagram; again, don’t for­get the power supply connections! Apply power to the breadboard and adjust the input sine wave at 1 volt peak-to-peak, and the fre­quency so that 1 full cycle occupies the 10 horizontal divisions (100 Hz).

Step 3

While watching the voltage V’ displayed on Channel 2, adjust the 5-MOhm potentiometer until this voltage is one-half the input voltage V1 (i.e., 0.5 volt peak-to-peak).

Step 4

When you have reached this point, disconnect the power to the breadboard. Without disturbing the potentiometer’s setting, remove the potentiometer from the breadboard. Then measure its resistance with an ohmmeter and record its value below:

Rpotentiometer = Ohm

This value is equal to the input impedance Z1 of the op-amp. For` the 741C op-amp, the input impedance is typically 2 MOhm, with a minimum value of 300 kOhm. For my experiment, I measured a value of 1.2 MOhm, which is within the device’s rating.






The purpose of this experiment is to measure the slew rate of a 741C op-amp.

Schematic Diagram of Circuit (Fig. 1-18)




The maximum change of the output voltage in response to a step input voltage is the slew rate o an op-amp. The slew rate is dependent upon the high-frequency response of the amplifier stages within the op-amp.


Slew rate is measured with an op-amp connected as shown in figure 1-18 This particular op-amp connection is a unity-gain, non-inverting configuration which will be discussed in future sections. It gives the worst (slowest) slew rate. The high-frequency components of a voltage step are contained in the rising edge, and upper critical frequency of an amplifier limits its response to a step input. The lower the upper critical frequency is, the more gradual the slope on the output for the step input.


Step 1  


Set your oscilloscope for the following settings:

• Channel 1: 5 volts/division

• Channel 2: 1 volt/division

   • Time base: 10 usec/division

• AC coupling



Wire the circuit shown in the schematic diagram and apply power to the breadboard. Adjust the square-wave input voltage at 5 volts peak-to-peak, and the input frequency so that 1 cycle occupies the scope’s display (10 kHz).


Step 3

Measure the peak-to-peak output voltage ΔV, and record your results below

Δ V = volts   



Figure 1-19

Step 4

As illustrated in fig. 1-19, measure the time Δt that it takes for output voltage to switch either from minimum to its maximum value, or vice versa, recording your results below:

Δ t =  usec


Step 5

From the measurements in Steps 3 and 4, calculate the slew rate ΔV/Δt, and record your result below:

       Slew rate = V/usec

For the 741C op-amp, the slew rate is typically 0.5 V/usec. As shown in Fig. 1-19, ΔV is 4.9 volts, and Δt is 10 usec, giving a slew rate of .49 V/usec.

    Step 6

Disconnect the power to the breadboard and insert a LM318 op-amp in place of the 741C (the pin connections are the same!). Apply power to the breadboardWhat do you notice about the output waveform?

The output wave-shape no longer resembles a trapezoid, but very nearly is identical to the input signal, as shown in Fig. 1-20. This is because the slew rate of the LM318 op-amp is typically 70 V/usec, or 140 times better than the 741C! Consequently, at 10 kHz this op­-amp is capable of responding to its input signal without distortion.







The purpose of this experiment is to determine the common-mode rejection ratio, or CMRR, of a 741C operational amplifier.


Schematic Diagram of Circuit (Fig. 1-21)

Fig. 1-21



Wanted signals appear on only one input or with opposite polarities on both input lines. These wanted signals are amplified and appear on the outputs as previously discussed. Unwanted signals (noise) appearing with the same polarity on both input lines are essentially cancelled byt the diff-amp and do not appear on the outputs. The measure of an amplifier’s ability to reject common-mode signals is a parameter called the common-mode-rejection-ratio (CMRR).

Ideally, a differential amplifier provides a very high gain for desired signals (single ended or differential) and zero gain for common-mode signals. Practical diff-amps, however, do exhibit a very small common-mode gain (usually much less than 1), while providing a high differential voltage gain (usually several thousand). The higher the differential gain with respect to the common-mode gain, the better the performance of the diff-amp in terms of rejection of common mode signals. This suggest that a good measure of the diff-amp’s performance in rejecting unwanted common-mode signals is the ratio of the differential gain Av(d) to the common-mode gain Acm. This ratio is the common-mode rejection ratio, CMRR.

: Acm =

The CMRR of 10,000, for example, means that the desired input signal (differential) is amplified 10,000 times more than the unwanted noise (common-mode). So, as an example, if the amplitudes of the differential input signal and the common-mode noise are equal, the desired signal will appear on the output 10.000 times greater in amplitude than the noise. Thus the noise interference has been essentially eliminated

Design Basics

Differential gain:    

Common-mode gain: Acm =

      Common-mode rejection ratio: CMRR (dB) 20 log10  AD/ACM

Step 1


Wire the circuit shown in the schematic diagram. Apply power to the breadboard and adjust the input frequency at approximately 60— 100 Hz. If you have a small filament transformer, you can use this instead of a sine-wave generator.

Step 2

With your AC voltmeter measuring Vi(cm), adjust the input voltage for at least 2 volts rms (this is an ac voltage measurement!). Record the common-mode input voltage below:

Vi(cm) = volts rms


    Step 3


Now measure the corresponding common-mode output voltage, V0(cm), recording it below:

Vo(cm) volts rms


    Step 4

Calculate the common-mode gain Acm, using the formula given in the Design Basics section, and record your result below:

 Acm =


Step 5

For this circuit, called a difference amplifier, and whose operation’ will be described in the next chapter, the differential gain Ad is 1000 (i.e., R2/R1) with the components shown. Now determine the com­mon-mode rejection ratio in dB using the formula given in the Design Basics section, and record your result below


For the 741C op-amp, the common-mode rejection ratio is typically 90 dB, with a minimum of 70 dB. To be technically correct, the term “common-mode rejection ratio” refers only to the ratio Ad /Acm,  while the term “common-mode rejection” refers to the common-mode re­jection ratio expressed in dB. Therefore, the common-mode rejection ratio for the 741C op-amp is typically 31,600, where the common-mode rejection is 90 dB:


Common-mode rejection  = 20 log10 (common-mode rejection ratio)

                                                       = 20 log10 (31,600)

 = 90dB

Since the exact definition of these two terms varies among manufac­turers, we will take the position that they mean exactly the same thing, that is, the rejection expressed in dB.


As a comparison, my results for this experiment are as follows:

Vi(em)            = 3.32 volts rms

Vo(cm)           = 0.285 volts rms

ACM                     = 0.085

so that,

CMRR        = 20 logl0(Ad/ACM)

= 20 log10(1000/O.0858)

=20 1og10(11,655)

= 81.3 dB




The purpose of this experiment is to determine the closed-loop response of the 741C op-amp by calculating its gain-bandwidth prod­uct (GBP).

Schematic Diagram of Circuit (Fig. 1-22)

           Fig. 1-22.


You have learned how negative feedback reduces the gain from its open-loop value. Now you will learn how it affects the amplifier’s bandwidth. Figure 6-21 graphically illustrates the concept of closed-loop frequency response for an op-amp is reduced by negative feedback, the bandwidth is increased. The closed-loop gain is independent of the open-loop gain up to the point of intersection of the two gain curves. This point of intersection is the critical frequency, fCL, for the closed-loop response, which equals the closed-loop bandwidth, BWCL. Notice that beyond the closed-loop critical frequency the closed-loop gain decreases at the same rate (called the roll-off rate) as the open-loop gain.

Gain-Bandwidth Product

An increase in closed-loop gain causes a decrease in the bandwidth and vice versa, such that the product of the gain and bandwidth is a constant. This is true as long as the roll-off rate is a fixed -20dB/decade. If ACL represents the closed-loop critical frequency (same as the bandwidth), then


The gain-bandwidth product is always equal to the frequency at which the op-amp’s open-loop gain is unity (unity-gain bandwidth)

ACLfC(CL) = unity-gain bandwidth

Design Basics

Gain-bandwidth product: GBP = (Av ) (BW) 

                                                                where Av =

BW =      op-amp bandwidth (the high-frequency response where the output voltage decreases by a factor of 0.707)

Step 1

Set your oscilloscope for the following settings:


Step 2

Wire the circuit shown in the schematic diagram. Apply power to the breadboard and adjust the input voltage so that the peak-to-peak output voltage is 2.0 volt . Make this adjust­ment as accurately as you can! As will be explained in Chapter 2, this op-amp circuit is an inverting amplifier, and, with the components shown, the voltage gain is unity (1.0). Check to see if the peak-to-peak input voltage is also 2.0 volt. It should be!


Step 3

Now slowly vary the input frequency until the peak-to-peak out­put voltage decreases to 1.414 volt. You may find that the output volt­age increases slightly before it starts to decrease. Measure the fre­quency at the point where the output voltage is 1.414 volt peak-to-peak, and record it below:

BW = kHz(Av =  1.0)

This is the bandwidth of the op-amp when the voltage gain is 1.0. The high-frequency response is now a factor of 0.707 less than the low frequency, or dc, response, and is equivalent to —3 dB.

Step 4

To compute the gain-bandwidth product GBP, multiply the band­width by the voltage gain, using the values of Step 3, and record your result below:

GBP = kHz

For my experiment, I measured a bandwidth of 392 kHz. Conse­quently the GBP is also 392 kHz, since the voltage gain is 1.0.



Step 5

Now change resistor R1 to 5 kOhm by placing another 10 kOhm resistor in parallel with the other 10 kOhm resistor. In addition, change Chan­nel 2 to 0.2 volt/division, and the time base at 1 usec/division. Vary the input frequency until the peak-to-peak output voltage is 2.8 volt . Measure the frequency at this point and record your result below

BW = kHz(Av =2.0)

 Is this value less than the value you measured in Step 3? It should be!

Step 6


As in Step 4, compute the gain-bandwidth product for this circuit, using a voltage gain of 2.0.

GBP = kHz

How does this value compare with the value that you computed in Step 4?

Within about 5%, these two values should be the same! By in­creasing the circuit’s voltage gain, the bandwidth decreases; however, the gain-bandwidth product, which is dependent on both the voltage and the bandwidth, remains constant! Therefore, the gain-band-product restricts the maximum high-frequency response of an op-amp circuit for a given value of voltage gain; the higher the volt-gain, the lower the bandwidth.

Now change resistor R1 to 1 kOhm. In addition, change Channel 2 to 1 volt/division and the time base to 5 usec/division. Vary the input frequency until the peak-to-peak output voltage is 14.1 volts (5 vertical di­visions). Measure the frequency at this point, and record your result below:

BW = kHz(Av = 10)

    Step 8


As before, compute the gain-bandwidth product, using a voltage of 10.

GBP= kHz

Within 5%, is there any difference between the above value and values you determined in Steps 4 and 6? The value should be the same in all three cases! You should now connclude that the gain-bandwidth product is a constant value, with the inverse dependency of bandwidth and voltage gain. Once you know the gain-bandwidth product for a particular op-amp, you im­mediately know the maximum voltage gain that you can have for a given input frequency, and vice versa. As with the slew rate, the GBP is a measure of the frequency response of an op-amp circuit. For ex­ample, if the GBP is 500 kHz, the maximum input frequency at which a given op-amp circuit can operate for a voltage gain of 100 is 5 kHz. However, the usual practice is to make the circuit’s voltage gain about 10 to 20 times less than the value allowed by the GBP at the particu­lar operating frequency. Suppose the gain-bandwidth product is 500 kHz and we wish to have an amplifier circuit with a voltage gain of 10. Consequently, this corresponds to a maximum voltage gain of 100 to 200. To be safe, assume that the maximum voltage gain is 100. Therefore, the maximum frequency at which we can expect this amplifier to properly function is:


BW         =   Av

= 500kHz


= 5 kHz


For this particular example, the amplifier will work properly with a voltage gain of 10 at 5 kHz.